1. Field of the Invention
The invention relates to FIFO queues used to pass information between two devices, and more particularly to a FIFO queue where entries in the queue can be replaced without reordering the queue.
2. Description of the Related Art
As current computer systems become more and more complicated, one trend is that more and more functions are being placed onto a single chip. However, one resulting problem limiting this integration is the number of pins needed on the chips. An increase in the pin count increases the costs of the chip and beyond certain pin count levels manufacturing both the chip and the circuit board becomes very complicated and thus expensive. Therefore it is desirable to reduce the number of pins on the chip. This leads to a trade off between function integration and cost.
Part of the pin count problem derives from the fact that the most common interfaces in computer systems are done in a parallel manner because of speed considerations. Addresses and data are provided in a parallel manner so that higher bandwidths can be obtained for a given clock rate. While serial links have been considered in some cases, one of the problems in general with a serial link is that it is often significantly slower than an equivalent parallel interface. For a given clock speed the serial link is at least N times slower, where N is the number of bits which must be transferred across the serial link to provide the same information which would be provided at one time is a parallel interface. This reduced data rate has limited the number of applications of serial links inside computer systems, so that even though they may have certain pin count advantages, the performance disadvantages limit their uses.
A further problem arises when interfacing between two devices, one that is higher speed and one that is lower speed. In this case it is very common to use a first in/first out (FIFO) queue to compensate for the differences between the data rates. FIFO queue logic is relatively conventional and will handle most situations where the higher speed device provides data in a burst fashion and can be held off when the FIFO queue is full, but conventional FIFO logic cannot handle the situation where the higher speed device cannot readily be held off, do that the FIFO queue would be readily overrun in those cases.
Another ongoing development in computer systems is the increasing use of audio, particularly high quality audio. This requires the use of a CODEC chip in the computer to perform the necessary digital and analog conversions. One characteristic of the CODEC chips is that quite often they have a number of control registers used to control their operation, which control registers it is desirable to read and write at a very high rate, as compared to the relatively slow data rates of audio data. It may take a relatively large number of control register operations to provide mode changes and these changes are often performed at a very high rate by the controlling processor. While this high rate of control versus the low data rate for the actual audio data is not a problem when a parallel interface is used, if a time multiplexed serial link is used, which is commonly utilized in digital signal processors (DSP) which are used to perform significant audio filtering and other operations, then a problem develops because the available effective transfer rate for the control registers is greatly reduced. In such a serial link control register information is often passed only in a single or very limited number of time slots in a serial fashion. This effectively slows down the maximum actual data transfer rate of the control information to that of the frame rate of the serial link.
When the device having the time multiplexed serial link is also connected to a bus of a much higher speed, such as one of the parallel busses present in the computer system to receive control information from the system microprocessor, it is quite possible to overrun the operations to the control registers in relation to the effective speed of the serial link. This is contrasted with the requirements of the audio where a relatively slow data transfer rate can be used to help reduce costs of the various components.
Therefore, it would be desirable to develop a structure which could balance the use of a time multiplexed serial channel to a CODEC with the need to rapidly provide the control information which is necessary for operation of the CODEC without greatly increasing costs of the components.